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A. R1(config)# controller t1 1/0 R1(config-controller)
# linecode hdb3 R1(config-controller)
# framing crc4 R1(config-controller)
# clock source line
R1(config-controller)# ds0-group 1 timeslot 1-24 type fxo-loop-start
B. R1(config)# controller t1 1/0
R1(config-controller)# framing esf
R1(config-controller)# linecode b8zs
R1(config-controller)# primary-group 1 timeslot 1-24 type fxo-loop-start
C. R1(config)# controller t1 1/0 R1(config-controller)
# framing esf R1(config-controller)
# linecode b8zs R1(config-controller)
# clock source line
R1(config-controller)# ds0-group 1 timeslot 1-24 type fxo-loop-start
D. R1(config)# isdn switch-type primary-5ess
R1(config)# controller t1 t1/0 R1(config-controller)
# pri-group timeslots 1-24
Answer: C
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